3RD INTERNATIONAL CONGRESS ON TECHNOLOGY - ENGINEERING & SCIENCE - Kuala Lumpur - Malaysia (2017-02-09)

Performance Analysis For Fine-grained Sw Offloading In Intelligent Flight Control Computer’s Memory System

Traditionally, the performance of a computer has been dominated by the performance of a central processing unit (CPU). However, while the performance of the CPU continues to evolve and follow Moore's law relatively well, the performance of memory has become slower in recent years. Because of the performance gap between CPU and memory, called Memory Wall Problem, which lowers the performance of the entire system, is ever becoming more important a problem. To solve the problem, many studies have attempted to improve the performance of the entire system by adding the processing power to the memory as well as developing the performance of the memory itself. This paper deals with performance analysis for SW off-loading in such an intelligent memory system. In contrast to previous studies, which mainly deal with large off-loads, this paper analyzes the effects of off-loads on a small scale, or more precisely, off-loads at the assembly level. It also points out the limit of off-load at the current assembly level and introduces new technology and architecture to overcome this problem. There are many ways to solve such a memory wall problem. The most intuitive solution is to improve the performance of the memory. As in the case of CPUs, memory has also improved the speed of integration along with the introduction of new processers. In recent years, methods using 3D integration technology [2] are emerging, and performance of memory is expected to increase dramatically. Another approach is to use an intelligent memory system that allows operations to be performed in memory using the same method as Processing-in-Memory (PIM) [3]. This approach can be very effective when running programs that have frequent memory accesses because it is possible to transfer data at a much faster rate than CPU and memory are connected by buses. For this reason, programs that require large amounts of memory access, such as drone applications, and programs that mainly use irregular memory access, such as graph algorithms, can greatly improve performance in this PIM architecture [4]. Another methodology that can perform only relatively small functions such as [5] on the memory side has been developed. This approach offloads all or most of the program to the memory side, rather than just a simple Scalar or SIMD operation. Compared to the method of off-loading a large unit (coarse-grained), the performance gain is not large, but it has several advantages in the other point of view. First, the existing system can be applied without any difficulty. As mentioned earlier, there are basically high-performance CPUs in existing computer systems. In this situation, it is very unlikely to use memory-only arithmetic functions without using the CPU for most of the time. Therefore, it is desirable to maximize the memory-side calculation function while taking advantage of the existing CPU. The second is a benefit in heat generation and power consumption. Unlike CPU, cooling system is weak in memory. Therefore, accumulating large numbers of logics that can generate a lot of heat can exacerbate the heat problem. Because of the characteristics of semiconductors, the power consumption increases and the operating speed slows down as the heat generation increases. Therefore, it is appropriate that only the fine-grained function of the memory side is handled. In this paper, we analyze the improvement of SW performance for fine-grained off-load. Unlike conventional methods, which have mainly performed coarse-grained off-loads, this study considers off-loading at the assembly level, which is the smallest off-load unit. To this end, it is assumed that the intelligent memory system is capable of simple level ALU operations. Acknowledgement: This research was supported by Unmanned Vehicles Advanced Core Technology Research and Development Program through the National Research Foundation of Korea(NRF), Unmanned Vehicle Advanced Research Center(UVARC) funded by the Ministry of Science, ICT and Future Planning, the Republic of Korea. (No. 2016M1B3A1A03937725)
Doosan Cho